Performance Improvement of 4-Bit Static CMOS Carry Look-Ahead Adder Using Modified Circuits for Carry Propagate and Generate Terms
نویسندگان
چکیده
منابع مشابه
An area-efficient static CMOS carry-select adder based on a compact carry look-ahead unit
This paper presents a highly area-efficient CMOS carry-select adder (CSA) with a regular and iterative-shared transistor structure very suitable for implementation in VLSI. This adder is based on both a static and compact multi-output carry look-ahead (CLA) circuit and a very simple select circuit. Comparisons with other representative 32-bit CSAs show that the proposed adder reduces the area b...
متن کاملDesign and Implementation of Low Power 8-bit Carry-look Ahead Adder Using Static CMOS Logic and Adiabatic Logic
Addition forms the basic structure for many processing operations like counting, multiplication, filtering etc. Adder circuits that add two binary numbers are of great interest for many designers. The simplest approach to design an adder is to implement gates to yield the required logic function. Carry-look ahead adder is a major functional block in arithmetic logic unit due to its high speed o...
متن کاملPerformance Analysis of 32-Bit Array Multiplier with a Carry Save Adder and with a Carry-Look-Ahead Adder
In this paper, design of two different array multipliers are presented, one by using carry-look-ahead (CLA) logic for addition of partial product terms and another by introducing Carry Save Adder (CSA) in partial product lines. The multipliers presented in this paper were all modeled using VHDL (Very High Speed Integration Hardware Description Language) for 32-bit unsigned data. The comparison ...
متن کاملPerformance Analysis of Different Bit Carry Look Ahead Adder Using VHDL Environment
Adders are some of the most critical data path circuits requiring considerable design effort in order to squeeze out as much performance gain as possible. Various adder structures can be used to execute addition such as serial and parallel structures and most of researches have done research on the design of high-speed, low-area, or lowpower adders. Adders like ripple carry adder, carry select ...
متن کاملTernary Multiplication Circuits Using 4-Input Adder Cells and Carry Look-Ahead
We introduce a new implementation of a ternary adder with four inputs and two outputs. This ternary adder reduces the number of digits in a multiplication compared with a binary multiplication. One advantage of the ternary adder is that four instead of three inputs within a binary representation will be summed up. In this paper we will compare the complexity of binary against ternary multiplier...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: Science Journal of Circuits, Systems and Signal Processing
سال: 2019
ISSN: 2326-9065
DOI: 10.11648/j.cssp.20190802.16